1. Field of the Invention
The present invention relates to a multi-layer wiring board, and in particular to a method for manufacturing the same.
2. Description of the Related Art
As the electronic apparatuses have been reduced in size and enhanced in performance in recent years, the semiconductor devices packaged in the electronic apparatuses and the multi-layer wiring boards for mounting them are required to be smaller and thinner in construction with higher performance and reliability. Due to these demands, the mounting method has transferred from a pin insertion package to a surface mounting package, and recently, a mounting method called a bare chip mounting has been researched in which the semiconductor devices are directly packaged on the printed circuit board. With the advent of multi-pin semiconductor devices, there is an increasing need for having a multi-layer substrate for mounting the semiconductor devices. For this multi-layer substrate, a built-up method of laying an insulating layer made of a photosensitive resin and a conductor layer which is formed by plating or deposition alternately on one side or both sides of the substrate has been proposed. However, a multi-layer wiring board of the built-up method involves a complex manufacturing process, with numerous steps, resulting in a problem of having low yield and taking more time for delivery. Also, a multi-layer method has been proposed (JP-A-8-288649) in which a glass epoxy laminate with one-sided copper has a projection of an electrically conductive paste formed on one face (copper face) by a dispenser, and an adhesive sheet and a copper foil are laid one on top of another and pressed, this process being repeated to make the multi-layer. However, this method is arguable in respect of the reliability of connection and the connection resistance, difficult to apply to the fine circuit, and for the multi-layer, required to repeat the press by the number of layers, taking more time to manufacture.
On the other hand, in the bare chip mounting, a silicone chip having a thermal expansion coefficient of 3 to 4 ppm/xc2x0 C. is directly bonded on a printed circuit board having a thermal expansion coefficient of 10 to 20 ppm/xc2x0 C. directly via an adhesive. Accordingly, a stress is applied due to a difference in thermal expansion coefficient between them, resulting in a problem that the connection reliability is lower. Also, the stress causes a problem of producing a crack in the adhesive to reduce the moisture proof. To relieve such stress, the stress may be diffused by providing the adhesive of lower elasticity. But with any of these methods, the connection reliability can not be fully secured. Further, to secure higher reliability of connection, it is indispensable to reduce the thermal expansion coefficient of the substrate.
In such an environment, the present inventors have proposed a multi-layer wiring board and a method for manufacturing the same, comprising a plurality of low thermal expansion double-sided circuit boards in which a wiring conductor is provided on either side of an insulating layer comprising an organic high molecular resin with a metal core as a basic substance, and the wiring conductors on both sides of the insulating layer are electrically connected via a through hole, these double-sided circuit boards being laminated as one piece via an adhesive layer (Japanese Patent Application No. 9-260201).
However, in the plurality of double-sided circuit boards for the multi-layer wiring board as described above, the through hole for electrically connecting the wiring conductors on the both sides of the insulating layer has a problem of producing a crack inside or at the corner portion of the through hole, as found in an environmental accelerated test such as a temperature cycle test. Therefore, the thickness of plating the through hole may be increased to enhance the reliability. But in this case, the refined wiring can not be provided in a circuit formation process by etching. On the other hand, to form the refined wiring, it is required to reduce the thickness of a conductor layer on both sides, but resulting in lower reliability of the through hole. And in a process in which the plurality of double-sided circuit boards are laminated via the adhesive layer as one piece, the wiring conductors on two double-sided circuit boards adjacent (piled) are electrically connected via a soldered electric conductor. However, because the soldered electric conductor can not be provided on the through hole of the double-sided circuit boards, the degree of freedom of wiring is largely hindered.
The present invention has been achieved in the light of the above-mentioned drawbacks, and its object is to provide a multi-layer wiring board having an extremely small thermal expansion coefficient, a high connection reliability and a great degree of freedom, and a method for manufacturing the same.
In order to achieve the above object, according to a first aspect of the present invention, there is provided a multi-layer wiring board, comprising a plurality of double-sided circuit boards in which wiring conductors are provided on both sides of an insulating layer comprising an organic high molecular resin with a metal core as a basic substance, and are electrically connected via a via hole having a low melting point metal filled therein, the plurality of double-sided circuit boards being laminated as one piece via an adhesive layer, said adhesive layer having a bore opened at a predetermined position of a portion in direct contact with the wiring conductors of two double-sided circuit boards, said bore portion being provided with a soldered electric conductor, in which said two double-sided circuit boards are electrically connected by said soldered electric conductor.
According to a second aspect of the invention, there is provided a method for manufacturing a multi-layer wiring board, including the steps of preparing a plurality of double-sided circuit boards in which wiring conductors are provided on both sides of an insulating layer comprising an organic high molecular resin with a metal core as a basic substance, and are electrically connected via a via hole having a low melting point metal filled therein, and an adhesive sheet having a bore opened at a predetermined position of a portion in direct contact with said wiring conductors of said double-sided circuit boards, bonding temporarily said adhesive sheet to said double-sided circuit boards in a state where a bore portion of said adhesive sheet is registered with respect to a predetermined portion of the wiring conductors provided on said double-sided circuit boards, forming a solder bump by filling a solder paste into the bore portion of each adhesive sheet by printing and fusing the solder paste by heating after bonding temporarily said adhesive sheet, and laminating said double-sided circuit boards as one piece and applying pressure and heat on said double-sided circuit boards, with the wiring conductors of said double-sided circuit boards being positioned to enable the predetermined electrical connections, after forming said solder bump.
The present inventors have made a series of researches to obtain a multi-layer wiring board having an extremely small thermal expansion coefficient, a high connection reliability and a great degree of freedom of wiring. As a result, the inventors have found that a multi-layer wiring board having an extremely small thermal expansion coefficient, a high connection reliability and a large degree of freedom of wiring can be fabricated by electrically connecting the wiring conductors on both sides through a via hole having a low melting point metal filled therein with a metal core as a basic substance, and have attained the present invention. In the multi-layer wiringboard of the present invention, it is possible to obtain a low thermal expansion double-sided circuit board by having the metal core as the basic substance. By laminating the low thermal expansion double-sided circuit boards integrally, it is possible to obtain a low thermal expansion multi-layer wiring board. Also, in the multi-layer wiring board of the present invention, a via hole with a low melting point metal filled therein may be provided, instead of the through hole. With this, there occurs no crack inside or at the corner of the hole in an environmental accelerated test such as a temperature cycle test, resulting in high connection reliability. By providing a soldered electric conductor on the via hole with low melting point metal filled therein, the wiring conductors of two double-sided circuit boards piled (adjacent up and down) can be electrically connected, resulting in a greater degree of freedom. On the other hand, a manufacturing method of the present invention comprises bonding temporarily an adhesive sheet on the double-sided circuit board in registration, forming a solder bump on a bore portion in this adhesive sheet, laminating the double-sided circuit boards in registration, and applying heat and pressure on the laminated double-sided circuit boards to integrate them. Therefore, a plurality of double-sided circuit boards can be integrated by application of heat and pressure at a time. At the same time, whatever the number of wiring conductor layers may be, the wiring conductors can be electrically connected by the application of heat and pressure at a time. In the present invention, a phrase xe2x80x9cpreparing an adhesive sheet bored at a position corresponding to a predetermined portion of each of the wiring conductors on the double-sided circuit boardxe2x80x9d means including an instance of boring after laying the adhesive sheet on the double-sided circuit board.
In the present invention, fabrication of the double-sided circuit boards may further comprise the steps of preparing a substrate having a conductor layer on both sides of an insulating layer comprising an organic high molecular resin with a metal core as a basic substance, and a bore at a predetermined position of the metal core, providing a through hole which is smaller than the bore at a portion of the substrate corresponding to the bore, filling a low melting point metal into the though hole, connecting electrically the conductor layers on the both faces of the substrate via the low melting point metal by plating both faces of the substrate after filling, and forming a circuit on the conductor layers on the both faces after plating. Thereby, the conductor layers on the both sides can be electrically connected by directly plating the low melting point metal filled into the through hole of the substrate, thereby making the conductor layer thinner.